Apr 8, 2009
Nanowires adopt zig-zag morphology
It is commonly accepted that silicon nanowires (Si-NWs) with diameters greater than 40 nm synthesized by the vapour-liquid-solid (VLS) growth technique using standard chemical vapour deposition methods tend to grow in the (111( direction. The reason for this lies in the fact that a silicon atom precipitating upon the (111( surface during growth produces the largest decrease in Gibbs free energy. When the diameter becomes smaller, the free energy of the side faces must be taken into consideration and other growth directions become more favorable.
However, many aspects of nanowire growth are beyond the scope of simple arguments based on near equilibrium growth controlled by surface energies. Changes in the growth direction reflect competing catalyst/silicon-nanowire interface and silicon-nanowire surface energetics. Thorough investigations have shown that the pressure in the nanowire synthesis process provides selective control over the growth direction. By dynamically changing the system pressure during the VLS growth process, morphological changes of the nanowire growth directions along their length have been demonstrated, resulting in zig-zag fashioned nanowires.
The nanowire shown in the figure above has three sections well separated by two kinks. The upper and the lowest part of the Si-NW with (111( growth direction and between them a central part growing along the [21-1] direction.
In the future, the optoelectronic transport (low loss coupling and transmission) properties of such zig-zag nanowires will be investigated to assess their potential as building blocks for silicon photonics systems. Silicon nanophotonic waveguides in a complementary metal-oxide-semiconductor (CMOS)-compatible silicon-on-insulator platform may result in further integration of optical and electrical circuitry.
The researchers presented their work in Nanotechnology.
About the author
The work was performed at the Vienna University of Technology, Vienna, Austria and supported by by the Society for Microelectronics (GME, Austria) and the Austrian Science Foundation (FWF, P18080-N07). Dr Alois Lugstein is associate professor at the Institute for Solid State Electronics. He is currently working on the monolithic integration of hierarchical nanowire (Si, Ge, GaAs) heterostructures with silicon devices and the electrical and optical characterization of these functional building blocks.