GaAs is an ideal and well developed material for light-emitting diodes, lasers and photodiodes, with GaAs-related alloys. Directly fabricating GaAs nanowires (NWs) on silicon opens the door to future III-V nanowire-based optoelectronic integration on silicon platforms.

To achieve the task, there are several issues to consider. The control of growth directions for III-V NWs on silicon is particularly important for device applications. The III-V NWs grow preferentially in the [111]B or A directions, but silicon(111) surface has no polar nature, that is, four equivalent {111} planes occur on its surface. This means that the III-V NWs are grown in the four equivalent <111> directions on the silicon(111) surface; one is normal to the (111) surface and the others are 19.6°-tilted <111> directions. These inclined directions do not provide a geometrical advantage for high-density integration of NWs.

The Hokkaido University group has overcome this problem by using a unique surface treatment and low-temperature growth. Finally, they have fabricated vertically aligned GaAs arrays on silicon. "The growth technique is based on a template method without catalysts, so this is excellent with clean silicon. In fact, the GaAs NW has no scratch." commented Katsuhiro Tomioka, a member of the team.

The researchers have also achieved a coherent growth of the GaAs NW without misfit dislocations due to lattice mismatch in GaAs/silicon.

The team reported its work in Nanotechnology.