Semiconductor nanowires have been studied intensely because of their highly tunable optical and electrical properties. They have been employed as functional elements in light emitting diodes, transistors and antireflective coatings. For all of these applications the position and density of the nanowires needs to be controlled.

Different approaches have already been reported, such as e-beam lithography, gold deposition through an anodic aluminium oxide template and nanosphere lithography. In general, these techniques do not allow for large-area structuring because of either high cost or a lack of long-range order. An alternative method is available – nanoimprint lithography. This technique is promising because it enables patterning of large surface areas at relatively low cost but, as mentioned earlier, the approach can still lead to undesired nanowires. For example, extra 'grass-like' wire growth between patterned arrays.

Substrate conformal imprint lithography

To improve the situation, the team has developed and optimized a wafer-scale soft nanoimprint method known as substrate conformal imprint lithography (SCIL) for controlling the position of InP and GaP nanowires. To fabricate uniform, defect-free nanowire arrays the researchers have systematically studied the effect of chemical and thermal treatment of the substrate, which contains gold catalyst particles, on nanowire growth. The process has been further optimized by adjusting the thickness of the gold layer.

Full details can be found in the journal Nanotechnology.