Researchers at the Consejo Superior de Investigaciones Cientificas (CSIC) have developed a "top-down" process to fabricate silicon nanowire transistors with a sub-10 nm channel size. The length of the nanowires can be varied from hundreds of nanometres to several microns. The nanolithography technique offers full control of the nanowire's shape from straight to circular or combinations thereof. It also enables the integration of several nanowires within the same circuit (see image).

The CSIC team has exploited the spatial accuracy of force microscopy to fabricate the nanowires in a given position in a circuit layout with sub-100 nm accuracy. The technique enables the fabrication of relatively complex circuits with silicon nanowires as the main element.

The fabrication principle is similar to that used in photolithography, except that instead of using photo-resist masks the CSIC team uses a silicon oxide mask. AFM oxidation nanolithography is applied to define a very narrow silicon oxide mask on top of a silicon-on-insulator substrate. During plasma etching, the silicon oxide mask protects the silicon underneath from the etching process while the uncovered part of the silicon layer is etched away. This generates a silicon nanowire with a rectangular section.

The nanowire can be integrated into a device to function as the main element of a field effect transistor. The fabricated silicon nanowire transistors show good electrical characteristics with an on/off current in the 105 range. The nanowires can be used to detect different chemical and biological interactions. As an example, the CSIC team has used a nanowire circuit to detect specific immunological interactions.

The team presented its work in the journal Nanotechnology.

•  More information on the group can be found at www.imm.cnm.csic.es/spm/index.html