Memristor cross-point arrays are highly scalable using cost-effective technologies such as nanoimprint lithography. Usually, a bottom metal nanowire electrode is first made on a flat surface, followed by the deposition of a switching layer and the fabrication of a top nanowire electrode. The bottom electrodes on the flat substrate form a set of "ribs" above the substrate. As a result, kinks are created in the top electrode for each device. These kinks are the mechanically and electrically weakest parts of the device, and can be detrimental to device performance, especially endurance.

Factor of four improvement

To address this issue, researchers from Hewlett-Packard Labs in the US have proposed and built a planar structure in which the bottom electrode is embedded into the substrate. Consequently, the switching layer and the top electrode are made on flat surfaces, resulting in a planar device without kinks. According to the group, the planar devices exhibited a factor of four improvement in the median endurance value over ribbed structures for otherwise identical structures. The researchers attributed the longer lifetime of the planar devices to the lower current density and less heating during device operation.

With the planar structure, the team expects that thicker metal nanowires could be used as electrodes, further reducing the series electrical resistance of the devices and the power consumption of the system. The scientists also anticipate that this new structure will be compatible with standard integrated circuit (IC) industry procedures such as the Damascene process.

The researchers presented their work in Nanotechnology.