Oct 17, 2013
An intermediate layer approach to grow InP nanowires on silicon
Researchers at the Australian National University have successfully circumvented the complexities that arise when growing III-V nanowires on silicon substrates. The team has grown homogeneous vertical indium phosphide nanowires on silicon by covering the substrate with a very thin intermediate InP layer.
III-V nanowire optoelectronics is a fast-emerging technology that takes advantage of the unique geometry of nanowires. While the performance of III-V materials is impressive, the higher cost, limited availability and incompatibility with mainstream microelectronics technologies pose challenges in realising these laboratory scale nanodevices on the commercial scale. The key to solving these problems would be to grow III-V nanowires on cheaper silicon substrates but this is not as straightforward as it sounds because of various incompatibilities between the two material systems that result in random and inhomogeneous III-V nanowire growth on silicon.
Isolating nanowires from the Si substrate by a buffer layer eliminates the complexities of direct nanowire growth on Si while preserving the epitaxial relationship with the Si substrate. The layer imitates an InP substrate for the nanowires and the resulting nanowires that are grown on the layer/Si substrate combination are similar to those grown on InP substrates alone.
Nonetheless, achieving a good InP layer on Si is not simple either. In our work, we have employed rather extreme conditions, in terms of metal organic chemical vapour deposition (MOCVD) growth parameters, to grow the InP layer. However, our research has also revealed that a small amount of crystal defects in the intermediate layer does not affect the nanowires, which is another advantage of this technique.
As the growth on the layer/Si structure is similar to growth on an InP substrate, the growth parameters for the nanowire growth on the layer structure and those for growth on InP substrate are the same. This technique can thus now be easily extended to seamlessly transfer InP nanowire devices that have already been demonstrated on InP, onto Si, simply by growing the layer on Si before the nanowire growth.
More information can be found in the journal Nanotechnology (in press).
Optimizing high-k dielectrics on InP nanowires (Mar 2010)
InP nanowires make good solar cells (Jan 2013)
Acceptor-free single crystal phase InP nanowires (Mar 2013)
Surface oxide mask directs InP nanowire growth (Jul 2012)
About the author
This research was carried out at The Australian National University. Ms Aruni Fonseka is a PhD candidate co-supervised by Prof. H Hoe Tan and Prof. Chennupati Jagadish in the Department of Electronic Materials Engineering. She is currently exploring the growth and characterisation of InP nanowires for optoelectronic and energy applications.