“We have made a general conceptual breakthrough by taking nanoelectronics in a new direction: exploiting nanomaterials not for electronic miniaturization, but for better and cheaper electronics over large areas,” researcher Xiangfeng Duan told nanotechweb.org. “We have assembled nanowires into densely packed oriented thin films that we can subject to conventional electronic fabrication processes. Since only conventional electronic fabrication processes are used, our technology may lead to the first practical and scalable nanomaterial-enabled electronics.”

To create a nanowire thin-film transistor, the scientists grew p-type silicon nanowires by catalytic chemical vapour deposition. Then they dispersed the wires into solution and used flow-directed alignment to assemble them on the substrate surface at room temperature. This created an oriented monolayer of nanowires with an average interwire spacing of 500-1000 nm, over areas as large as a four-inch wafer. Finally, Duan and colleagues used standard lithography followed by metallization to define source and drain electrodes for the thin-film transistor.

“In amorphous silicon or polycrystalline silicon thin-film transistors, carriers have to travel across multiple grain boundaries, but nanowire thin-film transistors have a perfect conducting channel formed by multiple single-crystal nanowire paths in parallel - like a log bridge,” explained Duan. “This ensures single-crystal carrier paths all the way across the source and drain electrodes, for high carrier mobility. We have demonstrated silicon nanowire thin-film transistors with a carrier mobility of about 100 cm2/Vs - far better than the current macroelectronic technologies of amorphous silicon or organic electronics, which typically have a mobility of less than 1 cm2/Vs.”

What’s more, the technique can exploit a broad range of substances as the channel material, including III-V and II-VI group semiconductors. As an example, Duan and the team made a thin-film transistor on a silicon substrate from single-crystal nanoribbons of CdS, a material that has useful optical and electrical properties.

The team also made a silicon nanowire thin-film transistor on a plastic substrate, namely polyetheretherketone (PEEK). The transistor had a threshold voltage of about 3 V, an on-off ratio above 105, and a subthreshold swing of 500-800 mV per decade, values that the researchers claim are among the best reported for thin-film transistors on plastic. Slight flexing of the plastic did not significantly affect the device’s properties.

“Our work has the potential to move electronics from single-crystal substrates to glass and plastic substrates, and to integrate macroelectronics, microelectronics - and potentially nanoelectronics - at device level,” said Chunming Niu, director of chemistry at Nanosys. “[The technology] can impact a broad range of applications in macroelectronics, from flat-panel display (e.g. driving circuitry for OLED displays), radio-frequency identification/communications, and systems on a panel, to a whole new range of universal wearable, disposable computing and storage electronics. It could also enable ‘smart textiles’ or ‘electronic paper’.”

The researchers reported their work in Nature.