For example, CNT transistors exhibit hysteretic behaviour in direct-current (DC) measurements with respect to gate voltage. In other words, the measured current depends on the voltage sweep direction. The reading also varies depending on sweep rate or environmental conditions. Hysteresis is typically attributed to charge trapping by surrounding water molecules or charge injection into the nearby substrate, making it difficult to extract "true" device properties, such as threshold voltage and electron mobility. A key question remains, how can we probe the intrinsic properties of such tiny electronic materials while limiting the effects of the ambient environment on the measurement?
Suppressing hysteresis
Pulsed characterization methods offer one possible solution and researchers from the University of Illinois, Urbana-Champaign, US, have been busy investigating the idea. Pulsed measurements performed over a wide temperature range (80–450 K) show that hysteresis in the transfer characteristics is reduced by varying the pulse off time. Longer off times allow trapped charge to tunnel out of the dielectric, preventing screening of the gate voltage and the resultant hysteresis between the forward and reverse gate sweeps.
The team has adapted a tunnelling model to correlate the trap relaxation times to the trap depth, which have been found to be in the ranges 0.01–10 s and 4–8 nm, respectively. The effective CNT mobility is extracted from the pulsed data and has been found to be in good agreement with recently published simulations. Mobility extracted from DC measurements on the same device is shown to vary greatly between the forward and reverse gate sweeps. This indicates that pulsed measurements offer a better approach to extracting the "true" electrical properties of nanoscale devices including CNTs, graphene, nanowires and molecular electronics.
Further details can be found in the journal Nanotechnology.