The feature sizes in conventional microelectronic circuits are becoming ever smaller and will one day inevitably hit the limit imposed by the fundamental and technological properties of silicon. Nanostructures, such as carbon nanotubes or semiconductor nanowires, made by bottom-up techniques rather than conventional top-down lithography, could step into the breach here. However, engineers are finding it difficult to make fully integrated systems from prototype devices for lack of efficient and easy methods to assemble and close-pack nanocomponents in the same circuit. "While this is enough of a challenge for planar circuits, the ultimate goal of rational 3D assembly at the nanoscale looks far beyond reach at present," says team leader Andrea Ferrari of Cambridge University.

Luckily, help could be at hand in the form of nanowire lithography (NWL), which is a combination of bottom-up and top-down techniques. NWL employs chemically grown nanowires as masks and has already been used to make simple electronic devices from metals and even graphene. It can be used to make self-aligned structures where two nanowires are superimposed along their whole length – a geometry that is almost impossible to achieve by other processes such as nanomanipulation or nanoassembly.

Now, Ferrari, together with Alan Colli of Nokia Research, and colleagues, have used NWL to make a thyristor-like circuit. Thyristors are electronic devices that generally contain a stack of three p-n junctions. The CNWT making up the circuit is a metal-oxide semiconductor (CMOS) thyristor, which is an important electronic component in low-power delay elements. "We have managed to embed electrical functionalities beyond those of a simple switch in this single nanoscale 'building block', that is naturally formed via a self-aligning process, rather than assembled using top-down methods," explained Ferrari.

Compatible with top-down processing
The CNWT itself is made up of two nanowires, one grown, the other etched into a silicon-on-insulator wafer using the first nanowire as a mask. "Such a device possesses an internal level of signal processing, particularly promising for analogue computation," he told nanotechweb.org. "Our fabrication process is also compatible with conventional top-down processing, but requires only a single lithographic step to define all electrodes. The advantage of our approach is that it allows us to build a working circuit, rather than just one component (such as a simple diode or a transistor), by virtue of the nanowires being vertically stacked."

The CNWT concept is a general one, he adds, and could find use in a variety of applications. "In our work, we demonstrated its use for signal processing but other devices might be made by using graphene or metallic nanowires – instead of the silicon-on-insulator – as masks for plasmonics." Plasmonics is a relatively new branch of photonics in which devices exploit both light and electrons.

The CNWT made is the simplest architecture possible using a single nanowire mask and the NWL self-aligned process. The researchers now hope to further elaborate their basic device by adding more electrodes to it.

The current work was published in ACS Nano.