For more than 50 years, silicon-based complementary metal-oxide-semiconductor (CMOS) transistors have been the mainstay of the electronics memory industry,” explains team member Gunuk Wang. However, such memory is reaching its fundamental limits because it is going to be difficult to make CMOS transistors any smaller using current technology – something that will be a drawback for next-generation nanomemory applications. These memories are also quite expensive to assemble and suffer from relatively low switching speeds (of a few microseconds).

Although researchers have been busy looking for other oxide-based alternatives to CMOS transistors, none have proved completely satisfactory. Most oxide-based RRAMs can be split into two categories: unipolar and bipolar memories. Most unipolar ones can be rather unstable in terms of switching and the bipolar ones, while more stable, appear to have lower ON-OFF switching ratios – among other faults. What is more, both types of memory require high-temperature processing techniques. They also generally have a large switching current, which makes them difficult to operate on the nanoscale. They thus need a so-called compliance current to prevent electrical shorting, and this requires an additional resistor in the device structure to further complicate matters.

Nanoporous silicon oxides could come into their own here, says team leader James Tour. Although the pore structures are already employed in electronics for producing and storing energy, and as templates for oxide memory applications, they have never actually been used as the active switching medium in resistive non-volatile memory applications until now.

Channel can repeatedly “rupture” and "re-form"

The new RRAM device is made of a nanoporous silicon oxide structure on a platinum-deposited silicon substrate, in which an internal vertical nanogap acts as a unipolar switch. When electricity passes through the silicon oxide channel, it strips away oxygen molecules and creates a channel of conducting nanocrystalline silicon that is less than 5 nm wide. Thanks to the heat produced by normal operating voltages, the channel can repeatedly “rupture” and "re-form" and these two states can then be read as either "0" or "1" depending on whether they are broken or intact.

“Depending on the two silicon phases (which are silicon nanocrystals or amorphous silicon), we can control different states according to the conductivity of the silicon channel,” Wang tells nanotechweb.org. “In fact we have demonstrated nine-bit different switching states simply using applied voltage pulses. Nine bits per cell is the highest value ever reported for any oxide-based memory made to date.”

According to the Rice team, the switching mechanism of the nanoporous silicon oxide memory can be understood in terms of the platinum metal breaking down on the sidewalls of nanoholes in the silicon oxide film.

Beyond current silicon-based flash memory

“Our research will be important for future computer memory device applications that go beyond current silicon-based flash memory,” adds Wang. “These applications could cover both dynamic random access memory (DRAM) and hard disk drive storage applications such as in ‘universal memory’, for example. The new oxide memory might even be good for making programmable logic arrays using nanoscale transistors.”

The researchers say that they are now busy trying to assemble 3D integrated memory structures for ultrahigh-density data switching using their nanoporous silicon oxide and extending the concept to other metal oxides.

They describe their current work in Nano Letters.