Graphene, a sheet of carbon just one atom thick, is a promising material for making molecular electronic devices of the future thanks to its unique electronic and mechanical properties, which include extremely high electrical conductivity and exceptional strength. The first real-world applications of graphene devices will most likely involve combining the carbon material with silicon complementary metal-oxide-semiconductor (CMOS) technology. However, integrating graphene with Si CMOS has proved to be more difficult than first imagined since there is no reliable process capable of producing large-area graphene films that have the same high performance as chip-scale ones.

Researchers have already tried out several methods for growing wafer-scale graphene, including epitaxially growing the material on SiC wafers, reducing graphene oxide, chemical vapour deposition (CVD) on metal thin films (such as copper) and recently CVD on hydrogen-terminated single-crystalline germanium surfaces. Among these techniques, CVD is probably the best in terms of compatibility with Si very large-scale integrated (VLSI) technology. However, there is a problem in that the graphene produced can be quite defective and so suffers from lower charge carrier mobilities.

Now, a team of researchers led by Deji Akinwande of the University of Texas at Austin and Ken Teo of Aixtron Ltd in Cambridge, have grown CVD graphene films that measure between 100 and 300 mm across on polycrystalline copper films. The as-made polycrystalline graphene appears to have better charge carrier transport characteristics compared to previously synthesized poly- or single-crystalline wafers. What is more, the graphene covers over 96% of the substrates and has few defects – something that the researchers confirmed using a technique called Raman mapping.

The team made more than 25,000 graphene field-effect transistors from its films – a figure that represents a device yield of nearly 75% (20% up from previous reports). Around 18% of the devices show a charge mobility of more than 3000 cm2/(Vs), which is more than three times higher than that previously seen in CVD polycrystalline graphene samples. And that is not all: the peak mobility of the devices was also about 40% higher than the peak mobility values reported for those made from single-crystalline graphene.

Scaling up "relatively straightforward"

“Our process is based on the scalable concept of growing graphene on copper-coated silicon substrates,” Akinwande tells nanotechweb.org. “Once we had developed a suitable method for growing high-quality graphene with negligible numbers of defects in small sample sizes, it was relatively straightforward for us to scale up.

The biggest challenge for scaling up to larger substrates is keeping the temperature and gas distribution uniform during CVD growth, he explains. The Aixtron team solved this problem by using an advanced gas showerhead, as well as multiple thermocouples to accurately balance temperature during this time.”

The Texas–Cambridge researchers say that they would now like to develop a wafer-scale automated transfer method for graphene that is compatible with Si processing. Current techniques are manual and thus not suitable for real-world practical applications, says Akinwande.

The present work is detailed in ACS Nano.