May 24, 2002
IBM claims carbon nanotube transistors beat silicon
US computing giant IBM says that it has created the best-performing carbon nanotube transistors to date. The company claims that the devices produced more than twice the transconductance per unit width of "top-performing" silicon transistor prototypes.
"Proving that carbon nanotubes outperform silicon transistors opens the door for more research related to the commercial viability of nanotubes," said Phaedon Avouris, manager of nanoscale science at IBM Research. "Carbon nanotubes are already the top candidate to replace silicon when current chip features just can't be made any smaller - a physical barrier expected to occur in about 10 to 15 years."
The IBM researchers made single-wall carbon nanotube field-effect transistors (CNFETs) with a structure similar to that of conventional silicon metal-oxide-semiconductor field-effect transistors (MOSFETs). The devices had gate electrodes above the conduction channel that were separated from the channel by a 15 - 20 nm layer of SiO2 dielectric.
IBM says that this geometry allows operation at low gate voltage and enables the switching of individual devices on the same substrate. Previously, most CNFETs have employed the silicon wafer as a gate and a thick gate dielectric - around 100 nm or more - but using the substrate as a gate means that all devices are turned on simultaneously, and a thick gate dielectric requires high gate voltages.
The IBM CNFETs exhibited a steep subthreshold slope - a measure of how well a transistor turns on and off - and high transconductance (current-carrying capability) at gate voltages close to 1 V. The maximum transconductance figure measured in the study was 3.25 µS.
What's more, the scientists were able to make both p-type and n-type transistors. CNFETs normally exhibit p-type behaviour, but before depositing the gate oxide film the scientists annealed the nanotubes in nitrogen at 425°C to create n-type devices. The top gate structure meant that the resulting n-type components were stable because the carbon nanotubes were not exposed to air.
Now the scientists are working on further reductions in gate dielectric thickness, higher dielectric constant materials and reductions in gate length to improve the performance of the CNFETs. IBM says that the devices may be competitive with silicon MOSFETs for future nanoelectronic applications.
The work is described in "Vertical scaling of carbon nanotube field-effect transistors using top gate electrodes", which is published in the 20 May edition of Applied Physics Letters.
About the author
Liz Kalaugher is editor of nanotechweb.org.